The present invention pertains to semiconductor electronic devices, comprising a substrate of monocrystalline semiconductor material, of one type of conductivity, and a semiconductor layer of a second type of conductivity which is opposite to the first type of conductivity, lying on the substrate, so as to form with it, a planar PN junction.
This invention is applied to junction diodes, bipolar transistors, power transistors, transistors in a Darlington configuration, integrated circuits and similar semiconductor devices in which there is at least one planar junction.
It is known that devices of the type indicated have a PN junction terminated by a cut or groove and for this reason are better known as mesa devices. This type of termination permits junctions with high inverse breakdown voltages to be achieved.
One disadvantage of such devices is the need to passivate the surface of the groove with a very thick layer of dielectric material, to assure electrical properties which are stable in time. The passivation process, for example, achieved with glass, is difficult and the possible reprocessing of reject devices is costly. Moreover, the materials used for the passivation contain contaminants (for example, the glass contains mobile ions: Na.sup.+, K.sup.+, etc.) which are difficult to control. The constancy of the physical and electrical properties of the devices produced are therefore not assured. Finally, the reliability of the devices fabricated in this way is not very high because their initial characteristics are subject to variations due to migration of the contaminants.